1. Field of the Invention
The present invention relates to an apparatus and a method for synchronizing frame and detecting a code group/number, which is applicable to initial cell search in 3GPP(Global Partner Program) asynchronous International Mobile Telecommunication (IMT)-2000 system. In particular, the present invention relates to an apparatus for synchronizing frame and detecting a code group/number with a tracking function to minimize degradation due to a frequency offset that is generally caused by timing difference between a receiving signal from a terminal and an internally generated signal in a base station, and a method thereof.
2. Description of the Related Art
To begin with, an apparatus for synchronizing frame and detecting a code group/number typically used in the related art is explained.
FIG. 1 is a block diagram showing the traditional procedure of synchronizing frame and detecting a code group/number.
As depicted in the diagram, the apparatus includes an on time despreader 10 for dispreading a receiving input by having a slot timing's position that is designated after slot synchronization as a sampling point; an energy storage 11 for storing outputted energy from the one time despreader; a frame synchronization and code group detector 12 for detecting frame synchronization and code groups by using the outputted values from the storage; and a code number detector 13 for detecting code numbers using the outputted values from the frame synchronization and code group detector 12.
The on time despreader further includes an integrate-dump circuit composed of a multiplier 10a and a integrator 10b for operating a receiving signal; a fast hadamard transformer (FHT) 10c for performing a fast hadamard transformation on the integrate-dumped value; and a squarer 10d for obtaining a despreaded energy.
The operation of the traditional apparatus for synchronizing frame and detecting a code group/number shown in FIG. 1 is now explained with reference to FIG. 2.
At first, synchronization of a slot is initiated at the time of system booting (S20).
Once the slot is synchronized, the on time despreader 10 despreads a receiving input having a position of a designated slot timing as a sampling point, and outputs the receiving input to an energy storage. Using the outputted value from the storage, the frame synchronization and code group detector 12 outputs information about the frame synchronization and the code group to the code number detector 13 (S21), in which an appropriate code number is detected (S22).
Unfortunately though, the previous asynchronous IMT-2000 system is often degraded due to a frequency offset that is originally caused by a decrease in the extracted energy for changing the position of the sampling during the normal operational procedure.
Typically, the frequency offset of the terminal and the base station during the initial cell search procedure is 3 PPM, which corresponds to 6 Khz in 2 GHz band. However, if the Doppler effect is taken into consideration, any frequency close to 7 Khz will go off as well.
In such case, even with the change of 1 frame (10 msec), a local clock (an internally generated signal) could be approximately Tc/8 ahead or behind of the receiving signal. This means that when 4 frames are passed, the local clock will be off by plus and minus ½, and the synchronization itself fails. (See FIG. 3 for reference.)
For better understanding, the following has been taken as an example.
FIG. 3 diagrammatically shows the state of detected energy according to the timing difference of internally generated signals corresponding to receiving signals in a frame synchronization and code group detector.
In the drawing, Y-axis indicates the energy values obtained by the despreader, and X-axis indicates the timing difference between the receiving signals and the internally generated signals.
Since the internally generated synchronous codes are generated by a digital domain, the energy spread thereof is indicated as ±Tc/2.
The point A in FIG. 3 illustrates a case where a maximum energy is detected particularly when the receiving signal and the internally generated signal are completely in accord with each other. Here, it is observed that as the timing difference from the point A gets larger, the detected energy decreases, eventually reaching “0”.
The point to get “0” is generated when the internally generated signal timing is ±½ chip against the receiving signal timing, and the corresponding energy distribution has the symmetric shape, as depicted in FIG. 3.
If the input signal sampling of the slot synchronization circuit starts at the point A of FIG. 3, operating 1 frame, and 7 Khz frequency offset is generated to the same direction as shown in FIG. 3, the internal generation time (the point B in FIG. 3) resulted from the slot synchronization is different from the receiving signal by Tc/8.
This indicates that the energy at the point B, compared with the point A, is decreased to a great extent. Similarly, if the frame synchronization and code number detector is operated on the point B by 1 frame, the internally generated time reaches to the point C. When the code number detector is operated once again, the location of the timing becomes the point D, where the timing difference from the original timing is as much as 3Tc/8. In such case, it becomes pretty difficult to distinguish the energy on the point C obtained from a noisy environment since the energy can be regarded as almost another form of noise.
In the meantime, since the initial cell searcher operates 2 or 3 frames, although it might be possible to initiate the slot synchronization at an extreme frame offset, the synchronization at a later stage (detection of the frame synchronization and code group/number) might be failed as well.
To solve the problems described above, it needs to develop a new apparatus for tracking a rough frequency or deriving a time offset in the intermediate operation of the cell searcher.